Semiconductor memory devices are important components in presently available industrial and consumer electronics products. For example, computers, mobile phones, and other portable electronics all rely on some form of memory for storing data. While many memory devices are typically available as commodity devices, the need for higher integration has led to the development of embedded memory, which can be integrated with systems, such as microcontrollers and other processing circuits.
Unfortunately, the density of commodity memory cannot match the ever-increasing demand for memory. Hence multiple commodity memories are used together to fulfill the system memory requirements. Multi-device memory systems can be implemented as a set of silicon chips grouped together in a single package (called a multi chip system—MCP), or a multiplicity of memory device packages grouped together on a printed circuit board.
More often, the multi-device memory systems employ, non-volatile devices, such as flash devices, for storage. Demand for flash memory devices has continued to grow significantly because these devices are well suited in various embedded applications that require non-volatile storage. For example, flash is widely used in various consumer devices, such as digital cameras, cell phones, USB flash drives and portable music players, to store data used by these devices. Market demand for flash memory has led to tremendous improvements in flash memory technology over the past several years both in terms of speed and density.
Some flash devices employ serial interfaces such as, for example, multiple flash devices, which are used to perform operations, such as read, write and erase operations, on memory contained in the devices. A system of devices connected in series has input ports in the first device and output ports in the last device as shown in FIG. 1. Data is serially transferred from the input ports in the first device to the output ports in the last device. The configuration of the series-connected devices shown in FIG. 1 will be discussed in detail below.
Those skilled in the art understand that multi-device systems are tested at the individual component level and at the system level to ensure robustness of operation. In particular, memory devices are tested at the chip level to ensure that their memory cells are not defective. A defective memory cell is one that does not store data properly, due to fabrication defects or other defects that may occur during fabrication or assembly of the memory device.
Although each device is tested through functional and DC test steps at wafer-level and package level to screen out the device with defects on memory or logic blocks, it is difficult to find which devices have failed once they are mounted on the system board after packaging with stacked devices in a series-connection configuration. In conjunction with this problem, if there were any single failed device in the system of devices connected in series, all devices on the connection would be shown as defective devices due to data transmission failure caused by the failed device.
Typically, a fault in any single pin or in the interconnection between devices in the system of devices connected in series causes all devices to be judged as “failed” and no more testing is possible. Needless to say that the cost of stacked devices is much higher than the cost of a single device, and even good devices without any faults could be thrown away, or a system board with these devices may be replaced with a new one.